Countdown Timer Circuit

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“Countdown Timer Circuit” is a project submitted by my group, namely, M. Amit, P. Briones, R. Enriquez, R. Lacson, A. Saldivar (yours truly), K. Tom, and A. Uy, for our ECE 130 – Computer Application class way back August 31, 2006 at University of St. La Salle, Philippines.

INTRODUCTION

The seven-segment decoder is used in many applications. This can be used in displaying letters or numbers. It is most commonly used in digital clock displays, clock timers, and others. Using this has some advantages. For example, with a seven-segment decoder display, it is easier to read the time in a digital clock than with an analog one. It can be easily read because it easily catches the eye.

The group has chosen to create the digital project, Countdown Timer, in order to show one of the applications of the seven-segment decoder. This is only one of the many useful things that can be created with this component. Countdown timers can be started and then stopped at any time and then the display will be showing how much time had passed in between. This timer can be used in different activities. It can be used in sports, games, and in other areas.

We will be showing in the following pages the circuit schematic diagram, what components are to be used, and how the circuit operates.

SCHEMATIC DIAGRAM

Figure 1: Minute counter circuit, Figure 2: Second counter circuit, Figure 3: Count out detector, Figure 4: Start/Stop control circuit

Figure 5: Countdown Timer Circuit

Figure 6: Actual MultiSim 01 Simulated Circuit

LIST OF MULTISIM 01 MATERIALS USED

+12V Voltage Source
+5V Voltage Source
2 – BCD SW
4 – 7 SEG LED
2 – switch
Diode
Relay Switch
NAND and NOR IC’s

IC’s (Integrated Circuits):

74HC192
74LS247
NE555
74HC20
74HC00
74HC04
78L05

Capacitors:

2 – 0.01 μF
1 – 0.1 μF
2 – 10 μF
1 – 100 μF

Resistors:

14 – 3.3 KΩ
15 – 1.2 KΩ
8 – 10 KΩ
1 – 68 KΩ
1 – 1 KΩ
1 KΩ Potentiometer
2 – 5.6 KΩ

OPERATIONS

This countdown timer circuit can be subdivided into four sections; namely, the minute counter circuit, the second counter circuit, the count out detector, and the start/stop control circuit.

The timer is supplying +12 V and +5 V separately is the power supply. It uses the 3 terminal voltage regulator to work at only +12 V. When using the 3 terminal voltage regulator, don’t supply the +5 V power supply from outside. When supplying +5 V from outside, do not mount the 3 terminal voltage regulator.

In the configuration of the minute counter (Figure 1), the 74HC192 (Presettable Synchronous Up/Down BCD Counter) is used as the counter. There is 74HC190 in the counter which can be down in the count which is used as the clear terminal as the second counter. The pulse signal (being the once per minute) from the second counter is inputted to DW (Count Down). The counter is count-downed by the low to high transition of the signal. The output of the BR (Borrow) becomes the L (the low level: 0V) when the counter becomes 0. Next, it changes into H (the high level: +5V) when the counter becomes 9. The counter of the upper places is count-downed by the change of such BR.

When the LD (load) terminal is in the L condition, the original value of the counter can be set with BCD-SW. At the time of this condition, because the value which is the same as the set value of BCD-SW spreads through the display part, too, you can confirm the set value in the display part.

When the LD is not in the H condition, the counter does not work. The condition of the LD is controlled with the control circuit which is controlling the operation of the timer. The BCD (Binary Coded Decimal) counter is the counter which handles from 0 to 9.

Next is the second counter circuit section (Figure 2) where 74HC192 is being used. The point in the second counter circuit is to make the 59 seconds next of the 00 seconds. For this part, the output of the NAND gate becomes in the L level when the 10th of the second display becomes 9. It inputs this output to LD. The input of the presetting is set to the counter when the LD becomes the L level. The circuit this time set “5” as the presetting. The output of the counter becomes “5” when “5” is set to the counter. With it, the output of the NAND gate becomes the H level. Because “5” was already set to the counter, there has no (or very minimal) effect. After that, the countdown is done from 5. The output of the counter becomes “9” momentarily but it is immediately set to “5”. No change can be seen.

For the count out detector (Figure 3), the L level is output by the BR, terminal of the counter when the count value becomes 0. The BR signal of each counter is reversed by the inverter and is inputted to the NAND gate. Only when the BR terminal of all counters becomes the L level, the output of the NAND gate becomes the L level. In addition from the clock generator, the pulse in the 1 second is inputted to the count-down terminal (DW) of the counter and the count-down is done. When becoming at 0’0″, the count-down is made to stop. The stop of the count-down is done in making the input of N3 the L level. When making the counter stop, it makes the count-down terminal stop in the L level condition. When stopping in the H condition, the BR terminal of each counter runs out in the L condition. Therefore, the counter start can not be restrained in the setting in the 0 minutes.

Lastly, the start/stop control circuit (Figure 4) operation uses the SR-type flip-flop (FF) which uses the NAND gate as the circuit which controls the operation (start/stop) of the timer. N1 is for the stop and N2 is for the start.

At the start operation, when the set value of the minute counter is not 00, the time-out signal becomes H. When the start switch is pushed at this time, the output of I1 becomes H and the output of N3 becomes the L. The output of N2 becomes H when the output of N3 becomes the L. The power ON reset signal becomes the L immediately after the turning on but after that, it becomes H. Because the time-out signal is H too, all input of N1 becomes H and the output of N1 becomes the L. The output of N1 is connected with the clear terminal of the second counter. The cleared condition is canceled when the clear terminal becomes the L. The output of N3 becomes H when the start switch becomes OFF. However, because the output of N1 is connected with the input of N2, the output of N2 is as the H condition.

Consequently, when the setting of the minute counter is the 00 minutes, the time-out signal is the L. When the start switch becomes ON in this condition, the output of I1 becomes H but because the time-out signal is the L, the output of N3 is H. The condition of N1 and N2 does not change. The timer is as the stop condition.

LIMITATIONS

The countdown circuit cannot be stopped unless it is turned off at the power supply or main switch.

The circuit can only be preset by manipulating the 74HC192 pre-settable synchronous counter because the BCD coder is not available in the MultiSim 01.

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